/****************************************************************************
*  Copyright 2017 Gorgon Meducer (Email:embedded_zhuoran@hotmail.com)       *
*                                                                           *
*  Licensed under the Apache License, Version 2.0 (the "License");          *
*  you may not use this file except in compliance with the License.         *
*  You may obtain a copy of the License at                                  *
*                                                                           *
*     http://www.apache.org/licenses/LICENSE-2.0                            *
*                                                                           *
*  Unless required by applicable law or agreed to in writing, software      *
*  distributed under the License is distributed on an "AS IS" BASIS,        *
*  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. *
*  See the License for the specific language governing permissions and      *
*  limitations under the License.                                           *
*                                                                           *
****************************************************************************/


#ifndef __USE_ARM_M1_COMPILER_H__
#define __USE_ARM_M1_COMPILER_H__


/*----------------------------------------------------------------------------*
 * Device IO Definition                                                       *
 *----------------------------------------------------------------------------*/

/* 
 * Include the cpu specific header file 
 */
/*============================ Freescale =====================================*/




/*----------------------------------------------------------------------------*
 * Architecture Definition                                                    *
 *----------------------------------------------------------------------------*/

//! \brief The mcu memory endian mode
# define __BIG_ENDIAN__                 false

/*ARM Cortex M4 implementation for interrupt priority shift*/
# define ARM_INTERRUPT_LEVEL_BITS       4

#endif

